As we all know about the gates of digital electronic circuits applicable to computer architecture, too, is part of the book is ignored in the synopsis presented here. We begin with a disturbing and priorities as follows:
Interrupt priority: Transfer data between the CPU of the computer and I / O device is initiated by the CPU. However, the CPU can not start the transfer, unless the device is ready to communicate with the CPU. Readiness of the device can be determined from the disturbing signal.
A priority interrupt is the system that forms a priority through various sources to determine the conditions that will be served first when two or more requests arrive simultaneously. Devices high transfer speeds, for example, magnetic disks is a high priority, slow devices like keyboards have a low priority.
Collection devices: establishing priorities simultaneously interrupts can be done with software or hardware. A poll voting procedure known as the devices used to identify the main priorities by source software means. The main priority is the source of the first tested, and if the interrupt signal is active, control branches to a service routine for this source. If not, here is a low priority source tested and so forth.
Micro programmed control unit and operating:
Microprogramming is a method of design where the control unit controls the signal selection and sequencing of the information stored in RAM or ROM memory called a control.
Virtual address is translated into physical addresses of computers that use virtual memory:
This is done by mapping the page address. Physical memory is broken down into the same group called block size. This page refers to a group of the same address space size. Mapping of the address space into memory space is facilitated if each is considered a virtual address is represented by 2 nos. - Address and page numbers in accordance with the page. When the program starts executing, one or more pages that are transferred to main memory and page sets the table to indicate their position. This program is run from main memory to attempt a referral to a page that is still in the auxiliary memory. This condition is known as a page fault. Then the implementation of this program is suspended until the program is brought into main memory. When an error occurs in the virtual pages of memory, it signifies that the page referenced by the CPU is not in main memory. Thus a new page is now transferred from auxiliary memory to main memory. If main memory is full, it will be very necessary to remove the page from the memory block to make room for a new page. Replacement of these policies will be used for FIFO and LRU. While the FIFO algorithm to choose a successor to a page that has been long in the memory of time, the LRU, a little share this page is a page with a count value.
---- What the associative memory used in the mapping of addresses in the cache memory system
The time required to find items that are stored in the memory can be reduced greatly if the data stored can be identified for access by the contents of the data itself rather than by address. As the memory unit accessed by content called associative memory or
Associative Mapping: associative memory used in the mapping of addresses in the cache memory system. Associative memory that stores both the address and content (data) from the memory word, so it permits the location of the cache to store each word from main memory.
O.S kernel
OS has a master's program called the supervisor or traffic controller or kernel. The kernel is the part of the OS that controls the other, and always in main memory. Kernel to run the main engine and carry out programs of resource management. Starting on the computer, the kernel is loaded in memory and control of the machine.
The function of the bootstrap loader, loader ----------
Loader time the store address. It produces the address at the time of storage to secondary storage in main memory. Bootstrap loader is absolute. This is the beginning of the program is loaded into memory at boot time.
Single pass assembler to process an assembly program
With the algorithm for one pass assembler is as follows:
Pass one
Step 1 ------- Initialize location counter to zero
Step 2 -------- read the source code lines
Step 3 ------- analyze statement
------- Translation process of analysis and synthesis stage
Analysis of the source text + synthesis from source = translation from source text to target text.
Direct Memory Access (DMA):
Transferring data between storage devices and fast memory is often limited by CPU speed. Removing the CPU from the road and let the outskirts of managing direct bus memory device to improve transfer speed. This transfer is a technique termed the DMA. During DMA transfers, the CPU is idle and has no control of the memory bus.
This all is a summary of the computer system architecture. Please readers liked it! And do not forget to rate this summary.
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